EECE 254 Course Outline


Note that specific material covered in the lectures is compiled from various sources. Where possible, the following list gives the relevant sections from the text by Sedra & Smith (Microelectronic Circuits, 5th Edition) for cross-reference; some sections listed many not have been covered completely.   Note that this list is also a list of required reading for the course.

 These readings are available from the UBC bookstore as a course pack if you do not wish to purchase the textbook.

Topics Included

 S&S, 5th Edition

 

 

Linear Circuits (Prerequisite/Co-requisit Material, not covered in Lecs)

 

     Signals in the Time and Frequency Domains

1.1 - 1.3

     Introduction to Amplifier Fundamentals

1.4 - 1.6

     Introduction to Digital Logic Inverters

1.7

     Review of Network Theorems

Appendix C

     Single Time Constant (STC) Networks

Appendix D

 

 

Module 1.  Diodes

 

1.1 The Ideal Diode

3.1

1.2 Real Diode Characteristics

3.2, 3.3

1.3 Modeling & Analysis of Forward-Biased Diode Circuits

3.3

1.4 Modeling & Analysis of Reverse-Biased Diode Circuits

3.4

1.5 Diode Applications

3.5, 3.6

 

 

Module 2.  Semiconductor Fundamentals

 

2.1 Charge Carriers & Transport Mechanisms

Lec. Notes

2.2 Currents in SemiconductorsDrift and Diffusion

& Handouts

2.3 The pn Junction

3.7

2.4 Introduction to BJT Structure & Characteristics

5.1, 5.2

2.5 Introduction to MOSFET Structure & Characteristics

4.1, 4.2

 

 

Module 3.  Bipolar junction Transistors (BJTs)

 

3.1 Large-Signal, DC Analysis of BJT Circuits

5.4

3.2 Small-Signal Equivalent Circuit Models of BJT

5.3, 5.6

3.3 Biasing Schemes for BJT Circuit Design

5.5, 6.3.3

3.4 Single-Stage BJT Amplifiers

5.7, 5.11

3.5 BJT Switching Circuits

5.3, 5.10

 

 

Module 4.  Metal Oxide Semiconductor FET (MOSFETs)

 

4.1 Large-Signal DC Analysis of MOSFET Circuits

4.3

4.2 Small-Signal Equivalent Circuit Models of the MOSFET

4.6

4.3 Biasing MOSFETs for Discrete & IC Applications

4.5, 6.3.1

4.4 MOSFET Amplifier Configurations

4.7, 6.5

4.5 NMOS & CMOS Inverter and Logic Circuits

4.10