EECE 583: Computer-Aided Design Algorithms for Integrated Circuits

[chip] 2014/2015 Term 2

Instructor: Dr. Steve Wilton

Recent years have seen an incredible increase in the achievable densities, speeds, and complexities of integrated circuits. The key to designing such complex chips is the use of complex computer-aided design tools. In this course, we will examine some of the optimization algorithms behind these CAD tools, and learn how CAD tools translate a circuit to a working chip.

We will study each aspect of the design flow including high-level design, technology dependent and independent optimization, partitioning, floorplanning and placement, and routing. We will talk about algorithms that target both custom chips and FPGAs.

Note that this course is NOT about the USE of CAD tools (there are other courses where you can learn to use the tools). This course is about the DESIGN of the tools themselves, and the algorithms employed by the tools.

This course will be of interest to three types of students:

This course will be primarily based on research papers. Each week, one or two papers will be assigned; we will then discuss these papers the following week in class. There will be several assignments and a final project. In each assignment, you will implement one of the algorithms described in class. The project will be somewhat open-ended; students with a research bent can tackle an open research problem, others may choose to work on implementing and evaluating a known algorithm.

Further information and handouts are available here.